Help customers with their design needs while increasing efficiency in your own processes with 3M temporary bonding and debonding solutions for semiconductor advanced packaging.
In order to meet new computing and design requirements demanded by IoT, 5G, augmented and virtual reality, and other global technology trends, IC manufacturers have turned to advanced packaging solutions to enable high device density integration in reduced footprint and enhance chip performance.
At 3M, we’ve developed solutions — the 3M™ OneFilm WSS Semiconductor Temporary Bonding Film Series (3M OneFilm) and 3M™ Wafer Support System (3M WSS) — that help customers enable wafer- and panel-level packaging and their sophisticated fan-out wafer- and panel-level counterparts, by addressing their key thermal and chemical resistance challenges.
3M offers a global team of material experts that are ready to help customers assess and address their specific technical requirements for seamless integration. From initial testing to mass production, our goal is to help you determine process compatibility and deliver timely solutions.
For more than 100 years, 3M has made product testing an essential part of delivering high-quality solutions — adhesives used for the 3M WSS and 3M OneFilm are no different. Our materials undergo strict adhesion, thermal and chemical resistance testing, so they can withstand new process, time, temperature and substrate requirements needed for fan-out wafer-level packaging (FOWLP) and fan-out panel-level packaging (FOPLP).
We analyze many different material properties, including:
For specific thermal, time and chemistry requirements, 3M technical experts can work with you and your team to identify a potential solution with direct support from global product development labs and manufacturing sites.
Fan-out wafer-level packaging
In FOWLP, front-end processed wafers are temporarily bonded to a rigid carrier for support during back-end processing, then debonded from the carrier and diced. Dice are then carefully rearranged on a wafer or panel, which is then molded to fill gaps. The result is a reconstituted wafer (or panel) with space (where gaps have been filled) for “fanned out” connection points.
Fan-out panel-level packaging
FOPLP, as its name suggests, takes FOWLP a step further by allowing for packaging and processing dice on a large square panel, which can handle more dice than a wafer, further reducing costs.
Heterogeneous integration takes different components (die, MEMS, sensors, etc.) that have been manufactured in separate processes and combines them into a single overall package. As a result, the package delivers better functionality and operational benefits (system-level performance, ownership costs).
Target applications: FOWLP, FOPLP, 3D through-silicon vias (TSVs)
Get more value out of your wafer- and panel-level packaging manufacturing process with 3M OneFilm, a solution designed specifically to enable the latest fan-out wafer- and panel-level IC packages.
3M OneFilm, which functions like our 3M WSS spin-coat materials, offers the thermal performance required by FOPLP, so you can boost productivity and drive down costs by producing more chips versus a wafer in the same amount of time.
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A. Molded wafer/panel B. Chip/die C. Glass carrier D. 3M OneFilm E. Passivation F. Solder bump
See how 3M OneFilm enables fan-out wafer- and panel-level packaging processes. 3M OneFilm can be used in the reconstitution process, or later as shown here where 3M OneFilm bonds the already-reconstituted wafer from the molding side for an RDL-last process.
Target applications: IGBT, FOWLP, LED, MEMS, 3D TSVs, heterogeneous integration
The 3M WSS — a complete IGBT and wafer-level packaging solution — combines world-class equipment with 3M™ Liquid UV-Curable Adhesive to enable the temporary bonding and debonding processes required for wafer thinning and high-temperature FOWLP and FOPLP (with 3M OneFilm) processes.
Temporarily bonding to a glass carrier provides a rigid, uniform support surface that minimises stress on the wafer during the subsequent processing steps, resulting in less warpage, cracking, edge chipping — and higher yields.
We’re currently formulating adhesive technology that aims to enable heterogeneous integration by maintaining non-oxide surfaces through ultra-high temperature copper-to-copper bonding processes.
Reach out to a 3M material expert to learn more about how we’re approaching copper thermocompression and its impact on heterogeneous integration.
Additional product viability testing for 3M WSS includes:
A. Semiconductor wafer B. 3M™ Liquid UV-Curable Adhesive C. 3M™ Light-To-Heat Conversion Release Coating (LTHC Ink) D. Glass carrier E. 3M™ Wafer De-Taping Tape 3305
The 3M WSS brings easy bonding and debonding with high throughput of more than 22 wafers per hour.
3M’s Electronics experts are ready to advise on any questions relating to semiconductors processing and handling and applications of 3M’s semiconductors manufacturing products.
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